Renesas Electronics /R7FA6M3AH /EPTPC0 /FFLTR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as FFLTR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)SEL 0 (0)PRT 0 (0)ENB 0 (0)EXTPRM

PRT=0, SEL=0, EXTPRM=0, ENB=0

Description

Frame Reception Filter Setting Register

Fields

SEL

Receive MAC Address SelectNOTE: The setting of these bits is only effective when EXTPRM=0, ENB=1and RPT=1.

0 (0): Only receive multicast frames matching the MAC address setting in FMAC0R(U/L).

1 (1): Only receive multicast frames matching the MAC address setting in FMAC1R(U/L).

PRT

Frame Reception EnableNOTE: The setting of these bits is only effective when EXTPRM=0 and ENB=1.

0 (0): Do not receive multicast frames.

1 (1): See SEL bit.

ENB

Reception Filter EnableNOTE: The setting of these bits is only effective when EXTPRM=0.

0 (0): Filtering is disabled (all multicast frames are received).

1 (1): See PRT and SEL bit.

EXTPRM

Extended Promiscuous ModeSetting

0 (0): Normal operation (unicast frames addressed to the EPTPC are received, filtering of PTP frames is applied, multicast filtering is applied, and all broadcast frames are received).

1 (1): Extended promiscuous mode (all frames are received)

Links

()